At Palo Alto Networks everything starts and ends with our mission: Being the cybersecurity partner of choice, protecting our digital way of life. We are a company built on the foundation of challenging and disrupting the way things are done, and we are looking for innovators who are as committed to shaping the future of cybersecurity as we are.
At Palo Alto Networks® everything starts and ends with our mission: protecting our way of life in the digital age by preventing successful cyberattacks. It’s not a small goal. It isn’t simple either, but we aren’t in this for the easy answer. As a company with a foundation in challenging the way things are done, we’re looking for innovators with a dedication to best. In return, your career will have a tangible impact – one that's working toward technology that affects every level of society.
Our mission doesn’t happen by treading softly – no, it happens by defining an industry. It means building products that haven't been thought of. It means selling products with a solutions mindset. It means supporting the infrastructure of a company that moves at an incredible speed – intentionally – to stay ahead of the world’s next cyberthreat.
We are looking for a self-motivated, team-oriented, senior networking ASIC design engineer to contribute the overall ASIC design effort from architecture definition to production. This individual will be a key member of the ASIC design team implementing complex digital logic used in next-generation firewall products. Responsibilities will include architecture/microarchitecture definition, design, implementation and validation of the ASIC.
- Responsibilities will include specification, architecture/microarchitecture definition as well as hands-on implementation work for every aspect of ASIC design, working closely with the product marketing, system, software, and ASIC design and verification teams.
- Developing ASIC chip level architecture/microarchitecture specifications
- Design implementation/RTL coding using Verilog/SystemVerilog
- Synthesis and timing closure
- Work with the physical design team to optimize layout and timing for the design
- Work with the verification team to evaluate and enhance test plans to increase test coverage
- BS EE, CE or CS; or equivalent work experience required, MSEE preferred
- Minimum of 5 years of ASIC design experience required
- Experience in going through several complete and successful ASIC design cycles from architecture to production required
- Strong leadership/communication/interpersonal skills required
- Strong Verilog/SystemVerilog skills required
- Strong synthesis and static timing analysis skills required
- Strong SystemC/C/C++ and Perl/shell script skills desired
- Experience in ASIC verification, formal verification and/or physical design/implementation desired
- Networking experience is highly desirable
We are the global cybersecurity leader, known for always challenging the security status quo. Our mission is to protect our way of life in the digital age by preventing successful cyberattacks. This has given us the privilege of safely enabling tens of thousands of organizations and their customers. Our pioneering Security Operating Platform emboldens their digital transformation with continuous innovation that seizes the latest breakthroughs in security, automation, and analytics. By delivering a true platform and empowering a growing ecosystem of change-makers like us, we provide highly effective and innovative cybersecurity across clouds, networks, and mobile devices.
Our Security Operating Platform is built for automation. It is easy to operate, with capabilities that work together, so customers can prevent successful cyberattacks. They can use analytics to automate routine tasks, so they can focus on what matters. We are known for continuously delivering innovations; and with Application Framework, we extend that to an open ecosystem of developers that benefit from our customers’ existing investment in data, sensors, and enforcement points.
We’re trailblazers that dream big, take risks, and challenge cybersecurity’s status quo. It’s simple: we can’t accomplish our mission without diverse teams innovating, together. To learn more about our dedication to inclusion and innovation, visit our Life at Palo Alto Networks page and our diversity website.
Palo Alto Networks is an equal opportunity employer. We celebrate diversity in our workplace, and all qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or other legally protected characteristics.
Additionally, we are committed to providing reasonable accommodations for all qualified individuals with a disability. If you require assistance or an accommodation due to a disability or special need, please contact us at firstname.lastname@example.org.
All your information will be kept confidential according to EEO guidelines.